VCSEL

Features

- Canon i5 Stepper For Precise CD and Alignment Control
- Wafer Backside Thin Film To Compensate Wafer Bending
- N+ Metal On Frontside of Chip for Coplanar Contacts
- Mesa Head Vertical ICP Etch, 6~12um Etch Depth
- Uniform Oxidation Process With Aperture to 5um In Diameter
- Planarization Process for More Integration and Reduced Pitch to 18um
- Batch Evaporated Au Metal For Excellent Thickness and CD Control
- Frontside Wafer Level MicroLens Process (Regular Or Grayscale)
- 100um Wafer Thinning Process and Ultra Thin Wafer Thinning Process
- Controlled Backside Process To Minimize Thin Wafer Breakage
- Bottom Emitting Process With Bump and GaAs MicroLens
- Transmission Grating
- Bottom Emitting Process With Via
- Copper Pillar Bump
✧ Bump Size: 18-20um
✧ Bump Height: Cu/Ni/AgSn = 15/3/12um After Reflow
✧ Bump Pitch: 30-40um

Testing

- Support Max. 4-Site Probing for Small Arrays
- Quasi-Continuous-Wave(QCW) Bias (100us, 1%)
- Can Support Max. 20A (QCW), 27V Output Forcing
- Measure Voltage and Power at Forcing Current Steps (QCW)
- Measure Wavelength at Assigned Current Bias
- Report V, Ith, Slope, Wavelength, Optical Power and PCE
- Support Near Field Test (NFT) and Far Field Test (FFT)

Applications

- 3D Sensing
- LiDAR
- AutoDrive